1. Field of the Invention
The present invention relates to a data processor and data processing methods. Particularly, it relates to a data processor and data processing method for use in the program development for a microcomputer which uses stack area in order to save program counter's values.
2. Description of the Related Art
A microcomputer saves the program counter's value indicating a restart instruction when returning to the function currently in operation, before the next function or interruption is executed. Stack area is used as a storage for preserving the program counter's values. The stack area is called a Last In-First Out (LIFO) memory, constituted in that the data entered last is taken out first.
Access address to the stack area is designated by a stack pointer (SP). The Sp's value varies according to the operation of the stack area, always indicating the latest access address onto the stack area. Therefore, the latest written data can be obtained on reading out from the stack area.
For example, the CALL instruction that is a subroutine instruction is executed at the function call. The CALL instruction saves the initial address of the instruction next to the function currently in operation as the PC's value for returning to the function currently in operation, on the stack area. Then, a branch address set up by the operand of the CALL instruction is saved in a program counter PC, and the function of a called party will be executed. A RET instruction, that is a return instruction from a subroutine, is executed at the end of the processing on the function of the called party. The execution of the instruction allows reading out a return address from a stack frame indicated by a SP to store the data into the program counter PC, and returning to the original function of the calling party.
An operation of saving the PC's values on the stack and returning there will be explained with reference to FIG. 12. A user program shown in FIG. 12 includes a main function 81 and a function of a called party 82.
The main function 81 includes instructions 811 "instA0", 812 "instB0", 813 (CALL instruction) "call |pc(A1)" and 814 "instCO". The initial addresses of the memory storing these instructions 811 to 814 are respectively defined as PC (A0), PC (B0), PC (call) and PC (C0). On the other hand, the function of the called party 82 includes instructions 821 "instA1", 822 "instB1" and 823 "ret". The initial addresses of the memory storing these instructions 821 to 823 are respectively defined as PC (A1), PC (B1) and PC (ret).
Further, the SP's value before executing the CALL instruction 813 is defined as SP (0) and the SP's value after executing the same is defined as SP (1).
When the CALL instruction 813 is read out during execution of the main function 81, the initial address PC (C0) of the instruction 814 next to the instruction 813 is saved on the stack 83 shown in FIG. 13 as the PC's value for return. The SP's value preserved in the stack 83 varies from SP (0) to SP (1) in accordance with the saving operation. The branch address PC (A1) designated by the object of the CALL instruction 813 is stored in the program counter PC, and then, the function of the called party 82 will be executed while reading the instructions sequentially from the instruction 821 of which the initial address is PC (A1). When the RET instruction 823 is read out at the end of the execution of the function of the called party 82, the PC's value for return is read out from the position designated by the current SP's value of the stack area 83, or SP (1), so to be set in the program counter PC, thereby resuming the processing of the main function from the instruction 814. The SP's value varies from SP (1) to SP (0) in accordance with the reading operation from the stack 83.
It is also possible to store in the stack area 83, the local variable and general purpose register's value used in the original function of the calling party, as well as the PC's value for return in the original function as mentioned above. A PUSH instruction is mainly used to save the values other than the PC's value on the stack area 83, and a POP instruction is mainly used to read out the values other than the PC's value from the stack area 83.
A storing and reading operation in and from the stack are 83 by the PUSH and POP instructions on the function values other than the PC's value, will be explained with reference to FIG. 14. A user program includes a main function 91 and a function of a called party 92.
The main function includes instructions 911 "instA0", 912 "instB0", 913 (CALL instruction) "call |pc (push)" and 914 "instC0". The initial addresses of the memory storing these instructions 911 to 914 are respectively defined as PC (A0), PC (B0), PC (call) and PC (C0). While, the function of a called party 92 includes instructions 921 (PUSH instruction) "push h1", 922 "instA1", 923 "instB1", 924 (POP instruction) "pop h1" and 925 "ret". The initial addresses of the memory storing these instructions 921 to 925 are respectively defined as PC (push), PC (A1), PC (B1), PC (pop) and PC (ret).
Further, the SP's values before and after executing the CALL instruction 913 are respectively defined as SP (0) and SP (1), and the SP value after executing the PUSH instruction is defined as SP (2).
When the CALL instruction 913 is read out during execution of the main function 91, the initial address PC (C0) of the instruction 914 next to the instruction 913 is saved on the stack 93 as the PC's value for return, as shown in FIG. 15. The SP's value preserved in the stack 93 varies from SP (0) to SP (1) in accordance with the saving operation. A branch address PC (push) designated by the object of the CALL instruction 913 is stored in the program counter PC, and then, the function of the called party 92 will be executed. The PUSH instruction 921 with the initial address PC (push) saves the data within the register h1 on the stack 93. The SP's value preserved in the stack 93 varies from SP (1) to SP (2).
Then, the instructions are sequentially read out to be executed. When the POP instruction 924 is read out in the function of the called party, the data is read out from the stack 93, so to be stored into the register h1. The SP's value in the stack 93 varies from SP (2) to SP (1). When the RET instruction 925 is read out at the end of the function of the called party, the PC's value for return is read out from the position designated by the current SP's value of the stack area, that is SP (1), so to be set in the program counter PC, thereby resuming the processing of the main function from the instruction 914. The SP's value in the stack 93 varies from SP (1) to SP (0) in accordance with the reading operation from the stack.
The processing will be the same in the case of calling functions in a nest shape. A flow of this calling processing will be explained with reference to FIGS. 16 and 17. The user program indicated in FIG. 16 includes a main function 101 and the functions of the first to n-th called parties 102 to 104.
The main function 101 includes instructions 1011 to 1014 (instA0, instB0, call |pc(push1), instC0). The initial addresses of the memory storing these instructions are respectively defined as PC (A0), PC (B0), PC (call0) and PC (C0). The function of the first called party 102 includes instructions 1021 to 1027 (pushh1, instA1, instB1, call |pc, instC1, pop h1, ret). The initial addresses of the memory storing these instructions 1021 to 1027 are respectively defined as PC (push1), PC (A1), PC (B1), PC (call1), PC (C1), PC (pop1) and PC (ret1).
Similarly, the function of the (n-1)th called party 103 includes instructions 1031 to 1037 (push h1, instA (n-1), instB (n-1), call |pc (pushn), instC (n-1), pop h1, ret). The initial addresses of the memory storing these instructions 1031 to 1037 are respectively defined as PC (push (n-1)), PC (A (n-1)), PC (B (n-1)), PC (call (n-1)), PC (C (n-1)), PC (pop (n-1)) and PC (ret (n-1)).
The function of the n-th called party 104 includes instructions 1041 to 1046 (push h1, instAn, instBn, instCn, pop h1, ret). The initial addresses of the memory storing these instructions are respectively defined as PC (pushn), PC (An), PC (Bn), PC (Cn), PC (popn) and PC (retn).
When the CALL instruction 1013 is read out during the execution of the main function 101, the initial address PC (C0) of the next instruction 1014 is saved on the stack 105 shown in FIG. 17 as the PC's value for return. At this time, the SP's value varies from SP (0) to SP (1a) in accordance with the saving operation. Next, the branch address PC (push1) designated by the object of the CALL instruction 1013 is stored in the program counter PC, and then, the function of the first called party 102 will be executed. The instruction 1021 with the initial address PC (push1) saves the data within the register h1 on the stack 105. At this time, the SP's value varies from SP (1a) to SP (1b).
Thereafter, the instructions are sequentially read out to be executed. When the CALL instruction 1024 is read out, the initial address PC (C1) of the next instruction 1025 is saved on the stack 105 as the PC's value for return, and the SP's value varies from SP (1b) to SP (2a). Next, the branch address PC (push2) designated by the object of the CALL instruction 1024 is stored in the program counter PC, and then, the function of the next called party will be executed. Similarly, when the CALL instruction 1034 is read out during execution of the function of the (n-1)th called party 103, the initial address PC (C (n-1)) of the next instruction 1035 is saved on the stack 105 as the PC's value for return, and the SP's value varies from SP ((n-1) b) to SP (na). Next, the branch address PC (pushn) designated by the object of the CALL instruction 1034 is stored in the program counter PC, and the function of the n-th called party 104 will be executed this time. The instruction 1041 with the initial address PC (pushn) saves the data within the register h1 on the stack 105. The SP's value varies from SP (na) to SP (nb).
Thereafter, the instructions are sequentially read out to be executed. When the POP instruction 1045 is read out, the data is read out from the stack 105 to be stored in the register h1. At this time, The SP's value varies from SP (nb) to SP (na). When the RET instruction 1046 is read out, the PC's value for return is read out from the position designated by SP (na), that is the current SP's value of the stack area 105, so to be set in the program counter, thereby resuming the processing of the function of the (n-1)th called party 103 from the instruction 1035. The SP's value varies from SP (na) to SP ((n-1) b) in accordance with the reading operation from the stack 105.
When the POP instruction 1036 is read out, the data is read out from the stack 105 to be stored in the register h1. The SP's value varies from SP ((n-1) b) to SP ((n-1) a). The RET instruction 1037 reads out the PC's value for return from the position designated by the current SP's value of the stack, that is SP ((n-1) a), so to set it in the program counter PC, thereby resuming the processing of the function of the (n-2)th called party. The SP's value varies from SP ((n-1) a) to SP ((n-2) b). Similarly, it returns to the function of the first called party 102, so to execute the instruction 1025. When the POP instruction 1026 is read out, the data is read out from the stack 105 to be stored into the register h1. The SP's value varies from SP (1b) to SP (1a). The RET instruction 1027 reads out the PC's value for return from the position designated by the current SP's value of the stack 105, that is SP (1a), sets it in the program counter PC, and the processing of the main function 101 resumes from the instruction 1014, when the SP's value varies from SP (1a) to SP (0). In this way, the processing can be returned to the main function 105.
A stack managing method of the first conventional data processor will be described with reference to the flow chart of FIG. 18.
At first, after activating a simulator that is a data processor, a user program is downloaded (Step 1801) and the information on the stack area obtained as a debug information is stored (Step 1802). Then, the data processor is in the command input waiting state (Step 1803). When it detects a command input (Step 1804), the command processing is executed (Step 1805). If the command is an end command to terminate the data processor (Step 1806), the data processor is terminated. As the result of the command processing, if an instruction execution flag has been set on the command (Step 1807), the data processor starts the execution of one instruction (Step 1808).
It is checked whether there exists a stack overflow such as stacking on the memory other than the stack area (Step 1810) during execution of the instruction (Step 1809). At the occurrence of the stack over flow, an error message is displayed (Step 1812), the instruction is interrupted (Step 1813) and the data processor goes into the command input waiting mode (Step 1803).
When the instruction interruption flag, which is set caused by errors and occurrence of breaks, is OFF after the completion of the instruction execution (Step 1811), the processing goes to the next instruction. When there arises a necessity to handle a break point or the like and the instruction interruption flag is turned to ON, the execution of the instruction is interrupted (Step 1813), and it goes into the command input waiting mode (Step 1803).
Thus, the first conventional data processor is provided with a function to check whether the stack operation is performed within the stack area or not. However, it is not provided with a function to check any unreasonable writing into the stack area or abnormal operation of the stack pointer.
As mentioned above, it is possible to store in the stack area the information on saving the return PC's value and local data at the execution of the function and interruption, or the like. However, if the value saved on the stack is carelessly rewritten, it is impossible to run the program properly. For example, if the saved PC's value is rewritten, the processing cannot return to the proper return position, so that there occurs a change in the running stream of the program, or a run-away of the program. Also in the case of rewriting the other values, the data is destructed, so that the proper operation cannot be executed at the return PC. Generally, since the stack area is placed on a part of a memory, the data within this area may be unfavorably changed not only by the stack operational instruction, but also by the writing instruction for memory.
In order to solve this problem, the second conventional data processor disclosed in the Japanese Patent Laid-Open Publication No. 5-181703 (Article 1) is provided with, in addition to a general stack area, a stack proposed only to save the PC's value (hereinafter, referred to as a PC stack), a PC stack pointer PCSP for designating a PC stack, a register SR0 which preserves the initial value of the PCSP and a register SR1 which varies according to the PCSP, thereby making it possible to check the writing into the PC stack.
The state of the PC stack 111 and the general stack 112 of the above second conventional data processor will be respectively described with reference to FIGS. 19 and 20. Before starting the program, the initial value of the PC stack pointer PCSP is transferred to the registers SR0 and SR1. Hereinafter, the value of the register SR0 is not changed until the value of the PC stack pointer PCSP is initialized. The general stack 112 is used in saving and returning the values other than the PC's value, while the PC stack 111 is only used in saving and returning the PC's value like a CALL instruction and a RET instruction.
This time, an operation of the second conventional data processor when its running the program of FIG. 16, will be described with reference to FIGS. 16, 19 and 20.
In the state of the PC stack 111 shown in FIG. 19, the value of the PC stack pointer PCSP before the execution of the CALL instruction 1013 of the main function 101 is defined as PCSP (0), and the value of the PC stack pointer PCSP after the execution of the CALL instruction 1034 of the function of the (n-1)th called party is defined as PCSP (n).
In the state of the general stack 112 shown in FIG. 20, the SP's value before the execution of the PUSH instruction 1021 of the function of the first called party is defined as SP (0), and the SP's value after the execution of the PUSH instruction 1041 of the function of the n-th called party is defined as SP (n).
When the CALL instruction 1013 is read out during execution of the main function 101, the value of the initial address PC (C0) of the next instruction 1014 is saved on the PC stack 111 as the PC's value for return. At this time, as illustrated in FIG. 19, the value of the PC stack pointer PCSP varies from PCSP (0) to PCSP (1) according to the saving operation. Simultaneously with the change in the value of the PC stack pointer PCSP, the value of the register SR1 varies to the same value as the PCSP (1). Next, the branch address PC (push1) designated by the object of the CALL instruction 1013 is stored in the program counter PC, and then, the function of the first called party 102 will be executed. The PUSH instruction 1021 with the initial address PC (push1) saves the data within the register h1 on the general stack 112. At this time, the SP's value varies from SP (0) to SP (1) as shown in FIG. 20.
Thereafter, the instructions will be sequentially executed. When the CALL instruction 1024 is read out, the value of the initial address PC (C1) of the next instruction 1025 is saved on the PC stack 111 as the PC's value for return. Here, the value of the PC stack pointer PCSP varies from PCSP (1) to PCSP (2), and simultaneously, the value of the register SR1 varies to the same value as the PCSP (2). Next, the branch address PC (push2) designated by the CALL instruction 1024 is stored in the program counter PC, and then, the function of the next called party will be executed.
Similarly, when the CALL instruction 1034 is read out during execution of the function of the (n-1)th called party 103, the value of the initial address PC (C (n-1)) of the next instruction 1035 is saved on the stack 111 as the PC's value for return. The value of the PC stack pointer PCSP varies from PCSP (n-1) to PCSP (n), and the value of the register SR1 varies to the same value as the PCSP (n).
The branch address PC (pushn) is stored in the program counter PC, and then, the function of the n-th called party 104 will be executed.
The PUSH instruction 1041 with the initial address PC (pushn) saves the data within the register h1 on the general stack 112. The SP's value varies from SP (n-1) to SP (n). Thereafter, the instructions are sequentially executed. When the POP instruction 1045 is read out, the data is read out from the general stack 112 to be stored in the register h1. The SP's value varies from SP (n) to SP (n-1). When the RET instruction 1046 is read out, the PC's value for return is read out from the position designated by the current value PCSP (n) of the stack 111, so to be set in the program counter, and the processing of the function of the (n-1)th called party resumes from the instruction 1035.
The value of the PC stack pointer PCSP varies from PCSP (n) to PCSP (n-1) according to the reading operation from the stack 111, and simultaneously, the value of the register SR1 varies to the same value as the PCSP (n-1). When the POP instruction 1036 is read out, the data is read out from the stack 112 to be stored in the register h1. The SP's value varies from SP (n-1) to SP (n-2). The RET instruction 1037 reads out the PC's value for return from the position designated by the current value PCSP (n-1) of the PC stack 111 and sets it in the program counter, thereby to resume the processing on the function of the (n-2)th called party. The PCSP's value varies from PCSP (n-1) to PCSP (n-2), and the value of the register SR1 varies to the same value as the PCSP (n-2) simultaneously.
In the same way, the processing returns to the function of the first called party 102, where the instruction 1025 is executed. When the POP instruction 1026 is read out, the data is read out from the general stack 112 so as to be stored in the register h1. The SP's value varies from SP (1) to SP (0). The RET instruction 1027 reads out the PC's value for return from the position designated by the current value PCSP (1) of the PC stack 111 and sets it in the program counter PC, thereby to resume the processing on the main function 101 from the instruction 1014. The value of the PC stack pointer PCSP varies from PCSP (1) to PCSP (0), and the value of the register SR1 varies to the same value as the PCSP (0) simultaneously. Thus, the processing can return to the step of the main function 101.
In the writing operation into the memory during execution of the instruction, the value of the writing address in the memory and the values of the registers SR0 and SR1 are compared with each other. If the above address in the memory exists within the registers SR0 and SR1, a write inhibit error is generated.
In this way, the second conventional data processor is provided with two kinds of stack areas, a PC stack area proposed only to save the PC's value and a general stack area proposed to save the other data, thereby preventing from unreasonable rewriting of the PC's value saved on the stack area. This data processor, however, in which originally one stack area is divided into two areas, needs two stack pointers in order to operate these stack areas and a register in order to control the areas. Therefore, the hardware components provided for the data processor is unfavorably increased. Additionally, since it takes no consideration of the unreasonable rewriting of the value saved on the general stack, there is a fear of making the local data of the calling party or the like destructed and a fear of running the program unfavorably after return.
As set forth hereinabove, in the first conventional data processor, since the stack area is provided in a part of the general memory, there is a fear of changing the content of the data not only by the stack operational instruction, but also by the writing instruction into the general memory, in other words, a fear of unreasonable rewriting. If the above unreasonable rewriting happens in the stored value such as the return PC's value and local data saved on the stack area, in the execution of the function and interruption, running the proper program becomes impossible in the first conventional data processor.
Since the second conventional data processor is provided with two kinds of stack areas, a PC stack area proposed only to save the PC's value and a general stack area proposed to save the other data, and further provided with two stack pointers for the operation of these areas and a register for controlling each area, it is defective in that the hardware becomes large in scale. Since it takes no consideration on the unreasonable rewriting of the value saved on the general stack, the local data of the calling party may be so destructed that the program cannot run properly after return.